Abstract
A side-channel in computing terms is a by-product of the implementation and functioning of a computer systems’ component part. Whether it be electromagnetic (EM) emissions, heat, light, or power consumption, these by-products can be measured and analysed to infer the internal hardware architecture and even encrypted data of a computer system. These side-channels are vulnerable to exploitation by Side-Channel Attacks (SCAs) by adversaries whose intent is to retrieve sensitive data or corrupt data.This thesis presents a novel categorisation and testing methodology of SCAs. The novel categorisation is based on the results of an investigation carried out of peer reviewed published research papers covering the period 2015-2022, with some additional investigation into some seminal works before this period. This investigation concluded that although there have been categorisations of SCAs in some areas such as IoT, microarchitecture and mobile devices for example, the research is lacking an all-inclusive categorisation which is presented in this work.
The novel categorisation then led to the creation of a ‘Unified Side-Channel Attack Testing Methodology (USCA-TM), a testing methodology that can be used as a process to test existing published open-source SCA exploit code that targets computer hardware. The test results presented here include worked examples and deep analysis of published open-source code that demonstrates SCA methods and techniques at a granular level. The data collected from the testing methodology is presented in the form of ‘hardware microbenchmark signatures’ that are the results of executing assembly-level code instructions that are critical components of a successful SCA. The identification of these critical components through microbenchmark signature data further validates the created categorisation and USCA-TM.
The contribution to research is supported through references to the author’s publications.
| Date of Award | 2024 |
|---|---|
| Original language | English |
| Supervisor | Richard Ward (Supervisor) & Andrew Ware (Supervisor) |