TY - JOUR
T1 - Design of an FPGA Based High-Speed Data Acquisition System for Frequency Scanning Interferometry Long Range Measurement
AU - Sivanathan, Sivagunalan
AU - Roula, Ali
AU - Li, Kang
AU - Qiao, Dun
AU - Copner, Nigel
PY - 2023/12/26
Y1 - 2023/12/26
N2 - Frequency Scanning Interferometry (FSI) has become a popular method for long-range, target based, distance measurements. However, the cost of developing such systems, particularly the electronic components required for high-speed data acquisition, remains a significant concern. In this paper, we present a cost-effective, FPGA-based real-time data acquisition system specifically designed for FSI, with a focus on long absolute distance measurements. Our design minimizes the use of third-party intellectual property (IP) and is fully compatible with the Xilinx FPGA 7 series families. The hardware employs a 160 MS/s, 16-bit dual-channel ADC interfaced to the FPGA via a Low Voltage Differential Signal (LVDS). The proposed system incorporates an external sampling clock, referred to as the K- clock, which linearizes the laser's tuning rate, enabling optical measurements to be sampled at equal optical frequency intervals rather than equal time intervals. Additionally, we present the design of a high-speed, 160 MS/s ADC module for the front-end analogue signal interface and the LVDS connection to the chosen FPGA. We demonstrate that the digitized data samples can be efficiently transmitted to a PC application via a USB interface for further processing.
AB - Frequency Scanning Interferometry (FSI) has become a popular method for long-range, target based, distance measurements. However, the cost of developing such systems, particularly the electronic components required for high-speed data acquisition, remains a significant concern. In this paper, we present a cost-effective, FPGA-based real-time data acquisition system specifically designed for FSI, with a focus on long absolute distance measurements. Our design minimizes the use of third-party intellectual property (IP) and is fully compatible with the Xilinx FPGA 7 series families. The hardware employs a 160 MS/s, 16-bit dual-channel ADC interfaced to the FPGA via a Low Voltage Differential Signal (LVDS). The proposed system incorporates an external sampling clock, referred to as the K- clock, which linearizes the laser's tuning rate, enabling optical measurements to be sampled at equal optical frequency intervals rather than equal time intervals. Additionally, we present the design of a high-speed, 160 MS/s ADC module for the front-end analogue signal interface and the LVDS connection to the chosen FPGA. We demonstrate that the digitized data samples can be efficiently transmitted to a PC application via a USB interface for further processing.
U2 - 10.1109/OJIM.2023.3347268
DO - 10.1109/OJIM.2023.3347268
M3 - Article
SN - 2768-7236
VL - 3
JO - IEEE Open Journal of Instrumentation and Measurement
JF - IEEE Open Journal of Instrumentation and Measurement
ER -