Modelling the temperature dependence of 28nm fully depleted silicon-on insulator (FDSOI) static characteristics based on parallel computing approach

Abdelgader M. Abdalla, I. T.E. Elfergani, Jonathan Rodriguez

Allbwn ymchwil: Pennod mewn Llyfr/Adroddiad/Trafodion CynhadleddCyfraniad i gynhadleddadolygiad gan gymheiriaid

1 Dyfyniad (Scopus)

Crynodeb

This paper provides a behavioral model of 28nm FDSOI technology for a wide temperature range. In this work, a multivariate interpolation lookup tables (LUTs) model considering temperature dependence for nanometer CMOS transistors is presented. The new approach is validated by comparison with the bias current and capacitances tables in a given wide range of the temperature for the simulation of MOS transistor circuits. This novel approach significantly enhances the simulation speed with sufficient accuracy via a dynamic programming procedure over the current state of the art models. Simulation results are implemented in a 28-nm fully depleted SOI (FDSOI) technology. The proposed model achieving speedups of up to eight orders of magnitude at transistor level considering temperature effect found in FDSOI compared to simulations with both the BSIM SOI model and the Lagrange interpolation lookup table model.

Iaith wreiddiolSaesneg
TeitlNanotechnology Materials and Devices Conference, NMDC 2016 - Conference Proceedings
CyhoeddwrInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronig)9781509043521
Dynodwyr Gwrthrych Digidol (DOIs)
StatwsCyhoeddwyd - 7 Rhag 2016
Cyhoeddwyd yn allanolIe
Digwyddiad11th IEEE Nanotechnology Materials and Devices Conference, NMDC 2016 - Toulouse, Ffrainc
Hyd: 9 Hyd 201612 Hyd 2016

Cyfres gyhoeddiadau

EnwNanotechnology Materials and Devices Conference, NMDC 2016 - Conference Proceedings

Cynhadledd

Cynhadledd11th IEEE Nanotechnology Materials and Devices Conference, NMDC 2016
Gwlad/TiriogaethFfrainc
DinasToulouse
Cyfnod9/10/1612/10/16

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